fpga 9 vivado 8 python 8 vhdl 7 verilog 7 eda 5 hdl 4 modelsim 4 simulation 4 systemverilog 4 VHDL 3 Xilinx 3 FPGA 3 altera 3 SystemVerilog 3 pynq 3 alveo 3 synthesis 3 rtl 3 tcl 2 riviera-pro 2 questasim 2 icestorm 2 ghdl 2 Vivado 2 python3 2 EDA 2 xilinx-vivado 2 asic 2 HDL 2 Verilog 2 lsp-server 2 vitis 2 vim 2 xsi 1 scripting 1 script 1 ASIC 1 questa 1 verification 1 siemens 1 xcelium 1 cadence 1 vcs 1 flow 1 quartus 1 synopsys 1 xsim 1 Python 1 cocotb 1 RTL 1 xsdb 1 xsct 1 xdc 1 vim-plugin 1 language server 1 routing 1 placement 1 DCP 1 Altera 1 Cadence 1 quantize 1 machine 1 learning 1 Python3 Generic-Library IP-Core 1 Management 1 Packaging 1 Simulation 1 Synthesis 1 Pre-Processing 1 Post-Processing 1 database 1 infrastructure 1 intel 1 ip-core 1 quartus-prime 1 vhdl-verification 1 Xcelium 1 linter 1 LSP 1 language 1 server 1 protocol 1 vimhdl 1 vim-hdl 1 coc-nvim 1 emacs-lsp 1 hdl-checker 1 language-server 1 mentor-msim 1 syntax-checker 1 vim-ale 1 vivado-simulator 1 fossi 1 icarus-verilog 1 lattice 1 spyglass 1 verilator 1 yosys 1 brevitas 1