Ecosyste.ms: Packages

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pypi.org "uvm" keyword

erroranalyzer 2.2.1
ErrorAnalyzer is the EDA tool of choice to understand and find simulation failures faster
3 versions - Latest release: over 2 years ago - 1 dependent repositories - 29 downloads last month - 10 stars on GitHub - 1 maintainer
Top 2.1% on pypi.org
cocotb 1.8.1
cocotb is a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python.
37 versions - Latest release: 8 months ago - 17 dependent packages - 71 dependent repositories - 51.7 thousand downloads last month - 1,638 stars on GitHub - 4 maintainers
hectare 0.2.4
VHDL generator from SystemRDL
4 versions - Latest release: almost 3 years ago - 1 dependent repositories - 43 downloads last month - 179 stars on GitHub - 1 maintainer
uvmgen 0.6.0
A toolkit of uvm tb generate.
6 versions - Latest release: 2 months ago - 57 downloads last month - 0 stars on GitHub - 1 maintainer
Top 9.7% on pypi.org
peakrdl 1.1.0
Command-line tool for control/status register automation and code generation.
11 versions - Latest release: 7 months ago - 3 dependent packages - 2 dependent repositories - 6.14 thousand downloads last month - 70 stars on GitHub - 1 maintainer
Top 9.5% on pypi.org
hwt 3.8
hdl synthesis toolkit
33 versions - Latest release: almost 3 years ago - 7 dependent repositories - 211 downloads last month - 188 stars on GitHub - 1 maintainer
Top 7.7% on pypi.org
peakrdl-uvm 2.3.0
Generate UVM register model from compiled SystemRDL input
9 versions - Latest release: about 1 year ago - 2 dependent packages - 4 dependent repositories - 6.63 thousand downloads last month - 45 stars on GitHub - 1 maintainer
ralbot-uvm 1.2.0
Generate UVM register model from compiled SystemRDL input
4 versions - Latest release: over 3 years ago - 1 dependent repositories - 36 downloads last month - 45 stars on GitHub - 2 maintainers
Related Keywords
eda 5 fpga 5 systemverilog 4 verilog 4 registers 4 asic 4 uvm-register-model 3 verification 3 vhdl 3 uvm-ral-model 2 compiler 2 generator 2 tool 2 systemrdl-compiler 2 register-descriptions 2 axi 2 testbench 2 register abstraction layer 1 FPGA 1 ASIC 1 amba 1 apb 1 command-line-tool 1 csr 1 hardware-description-language 1 codegen 1 codegenerator 1 hcl 1 hls 1 rtl 1 simulator 1 systemc 1 hdl 1 jspec 1 systemrdl 1 UVM 1 template 1 test 1 python 1 tools 1 uvmgen 1 SystmRDL 1 PeakRDL 1 CSR 1 verilator 1 C 1 header 1 software 1 Verilog 1 SystemVerilog 1