proxy.golang.org : github.com/reds-heig/logisim-evolution
Digital logic design tool and simulator
Registry
-
Source
- Documentation
- JSON
purl: pkg:golang/github.com/reds-heig/logisim-evolution
Keywords:
circuit
, circuits
, digital-circuit
, digital-circuits
, digital-logic
, digital-logic-design
, education
, fpga
, logic
, logisim
, logisim-evolution
, simulator
, timing-diagram
, verilog
, vhdl
License: GPL-3.0
Latest release: about 1 year ago
First release: over 10 years ago
Stars: 5,617 on GitHub
Forks: 709 on GitHub
Total Commits: 3688
Committers: 122
Average commits per author: 30.23
Development Distribution Score (DDS): 0.733
More commit stats: commits.ecosyste.ms
See more repository details: repos.ecosyste.ms
Last synced: 22 days ago