Ecosyste.ms: Packages
An open API service providing package, version and dependency metadata of many open source software ecosystems and registries.
pypi.org "Verilog HDL" keyword
crecomp 1.5.2
creator for Reconfigurable Component. Framework and Code generator for FPGA component12 versions - Latest release: over 7 years ago - 2 dependent repositories - 45 downloads last month - 13 stars on GitHub - 1 maintainer
flipsyrup 0.9.0
Cycle-Accurate Hardware Simulation Framework on Abstract FPGA Platforms1 version - Latest release: over 9 years ago - 2 dependent repositories - 5 downloads last month - 6 stars on GitHub - 1 maintainer
ipgen 1.0.1
IP-core package generator for AXI4/Avalon6 versions - Latest release: over 5 years ago - 3 dependent repositories - 27 downloads last month - 19 stars on GitHub - 1 maintainer
pycoram 1.0.1
Python-based Portable IP-core Synthesis Framework for FPGA-based Computing5 versions - Latest release: over 8 years ago - 3 dependent repositories - 17 downloads last month - 47 stars on GitHub - 1 maintainer
magia-ip 0.0.1
IP libraries designed with Magia1 version - Latest release: 4 months ago - 9 downloads last month - 0 stars on GitHub - 1 maintainer
Top 8.4% on pypi.org
75 versions - Latest release: 9 months ago - 1 dependent package - 6 dependent repositories - 356 downloads last month - 297 stars on GitHub - 1 maintainer
veriloggen 2.3.0
A Mixed-Paradigm Hardware Construction Framework75 versions - Latest release: 9 months ago - 1 dependent package - 6 dependent repositories - 356 downloads last month - 297 stars on GitHub - 1 maintainer
Top 3.3% on pypi.org
23 versions - Latest release: over 3 years ago - 3 dependent packages - 36 dependent repositories - 2.35 thousand downloads last month - 571 stars on GitHub - 1 maintainer
pyverilog 1.3.0
Python-based Hardware Design Processing Toolkit for Verilog HDL: Parser, Dataflow Analyzer, Contr...23 versions - Latest release: over 3 years ago - 3 dependent packages - 36 dependent repositories - 2.35 thousand downloads last month - 571 stars on GitHub - 1 maintainer
syn-magia 0.3.0 removed
Magia generates Synthesizable SystemVerilog in pythonic syntax8 versions - Latest release: 5 months ago - 140 downloads last month - 545 stars on GitHub - 1 maintainer
magia-hdl 0.5.0
Magia generates Synthesizable SystemVerilog in pythonic syntax5 versions - Latest release: 4 months ago - 2 dependent packages - 75 downloads last month - 7 stars on GitHub - 1 maintainer
magia-flow 0.2.1
Design flow integration and automation with Magia4 versions - Latest release: 29 days ago - 129 downloads last month - 0 stars on GitHub - 1 maintainer
Related Keywords
FPGA
9
RTL Design
4
EDA
4
ASIC
4
Code Generation
4
Hardware Description Language
4
HDL
4
RTL
4
Synthesizable
4
SystemVerilog
4
verilog-hdl
2
python
2
hardware
2
compiler
2
IP-core
2
High-Level Synthesis
2
AMBA AXI4
2
parser
1
dataflow-analyzer
1
control-flow-analyzer
1
code-generator
1
Visualizer
1
Code Generator
1
Control-flow Analyzer
1
Dataflow Analyzer
1
Parser
1
Lexer
1
pyverilog
1
Avalon
1
high-level-synthesis
1
hardware-construction-language
1
IP-XACT
1
Cycle-Accurate Simulation
1
component
1
Memory System Abstraction
1
FPGA-based Rapid Prototyping
1