Verilog 50 RTL 40 FPGA 21 Python 17 VHDL 15 ASIC 15 HDL 11 verilog 10 tool 10 systemverilog 9 SystemRDL 9 hdl 8 generator 8 compiler 8 CSR 8 PeakRDL 8 register abstraction layer 7 registers 7 fpga 7 EDA 7 UVM 6 asic 6 rtl 6 eda 5 python 5 simulation 5 Xilinx 5 RTL Design 4 vhdl 4 Code Generation 4 Hardware Description Language 4 Verilog HDL 4 Synthesizable 4 cocotb 4 Coverage 4 xilinx 3 modelsim 3 Altera 3 csr 3 systemrdl-compiler 3 synthesis 3 DV 3 verification 3 PSS 3 Functional Verification 3 Vivado 3 python3 3 pdf 2 IPXACT 2 Parser 2 software 2 md 2 rst 2 html 2 command-line-tool 2 hardware-description-language 2 register-descriptions 2 uvm 2 uvm-register-model 2 header 2 C 2 Software Generation 2 Register Synthesis 2 Register Addressing 2 amba 2 Memory 2 Hierarchical Register Description 2 Hardware Design 2 apb 2 Firmware Generation 2 Electronic Systems 2 axi 2 Electronic Design Automation 2 Documentation Generation 2 Co-simulation 2 Control and Status Registers 2 Bus Interface 2 vivado 2 cadence 2 flow 2 siemens 2 questa 2 Cocotb 2 xcelium 2 vcs 2 synopsys 2 coverage-database 1 functional-coverage 1 ucis 1 Metrics 1 DSim 1 pytest 1 plugin 1 documentation 1 TL-Verilog 1 accellera-ucis 1 simulator 1 test 1 testing 1 unit-testing 1